1. Field of the Invention
The exemplary embodiments generally relate to a structure and method of making a heterojunction bipolar transistor (HBT) including an n-type doped crystalline silicon emitter stack that is formed upon a crystalline silicon cap, into which the n-type dopant from the emitter stack has diffused during its formation to form the n-type doped emitter of the HBT. More specifically, formation of the n-type doped crystalline silicon emitter stack on the crystalline silicon cap improves vertical scaling, by reducing the height of emitter structures, for HBTs of 130 nm node technology and beyond.
2. Description of Related Art
A heterojunction bipolar transistor (HBT) is a bipolar transistor that is formed on a crystalline silicon (Si) substrate, which includes a heterojunction, such as silicon/silicon germanium (Si/SiGe), to provide superior conduction for operation at high frequencies. This type of HBT uses a Si/SiGe heterojunction formed by epitaxially growing a crystalline SiGe layer on the crystalline Si substrate. Since the crystalline Si substrate and crystalline SiGe layer are made of materials that are compatible with conventional photolithography processes, the HBT can be made at low cost with high yields. A Si/Si1-xGex HBT also offers the ability to continuously adjust the bandgap of the heterojunction because Si and Ge are solid-soluble in each other to substantially any percentage.
FIG. 1 is a cross-sectional view illustrating a conventional npn-type, SiGe HBT 100. A collector 105 is formed within an upper portion of a crystalline silicon substrate layer that is disposed between device-isolating shallow trench isolators 102 and a deep trench 103. The crystalline silicon substrate layer is grown epitaxially and an n-type impurity, such as phosphorus (P), is introduced into an upper portion of the crystalline silicon substrate layer during epitaxial growth or by ion implantation to form an n-type doped silicon crystal, as the n-type crystalline collector 105 of the HBT. A crystalline Si1-xGex layer, including an undoped i-Si1-xGex layer 110 and p-type doped p+Si1-xGex layer 120, is formed over the n-type crystalline collector 105. The undoped i-Si1-xGex layer 110 is epitaxially grown by an admixture of a silicon-containing gas, such as silane (SiH4) or disilane (Si2H6), and a germanium-containing gas, such as germane (GeH4) or digermane (Ge2H6), respectively. Another gas, for example, borane (B2H6), containing the p-type impurity, boron (B), is added to silicon-containing and germanium-containing gases, to epitaxially grow the p-type doped crystalline p+Si1-xGex layer 120 on the undoped i-Si1-xGex layer 110. The p-type doped crystalline p+Si1-xGex layer 120, which mainly forms an internal base of the HBT, is electrically connected to an external base layer 125. An undoped crystalline silicon cap 130 is then epitaxially grown over the p-type doped crystalline p+Si1-xGex layer 120. Together, the undoped crystalline silicon cap 130, and the p-type doped and undoped crystalline Si1-xGex layers 120, 110 form a Si/Si1-xGex heterojunction.
Referring to FIG. 1, an emitter opening is formed above a central portion of the undoped silicon cap 130, through an external base layer 125 and an insulating layer 160, by processes well known in the art. The emitter opening may be lined with insulating sidewalls 150, upon whose exposed surfaces are formed non-crystalline polysilicon (not shown). An n-type doped non-crystalline polysilicon 140, which incorporates an n-type impurity, such as phosphorous (P), is deposited at 650° C., using a silicon-containing gas, such as silane (SiH4), and a phosphorus-containing gas, such as phosphine (PH3), within the emitter opening and over the insulating layer 160. Following deposition, the substrate is heated at 925°, causing phosphorus (P) from the n-type doped non-crystalline polysilicon 140 to diffuse into a central portion of the undoped crystalline silicon cap 130, forming the n-type diffusion-doped crystalline emitter of the HBT. Subsequently, the n-type doped non-crystalline polysilicon 140 is annealed, patterned and etched to define T-shaped emitter lead electrode 140.
By the processes described above, an npn-type Si/Si1-xGex heterojunction bipolar transistor (HBT) 100 is provided, in which the n-type diffusion-doped emitter 130 is made of single crystal silicon, the p-type internal base 120 is mainly made of a Si1-xGex crystal, and the n-type doped collector is made of single crystal silicon. It should be noted, however, that the emitter/base/collector junctions are partitioned from one another, not by the boundaries of the Si/SiGe crystals, but by the concentration profiles of the doping impurities.
An important goal of integrated semiconductor circuit manufacturing is to reduce the size and scale of electronic devices to increase speed, reduce power and decrease cost. As device scaling approaches the 130 nm node technology and beyond, alignment issues complicate the methods of semiconductor integration.
There remains a need to develop processes and structures for a heterojunction bipolar transistor (HBT) that uses existing semiconductor manufacturing processes to improve vertical scaling for HBTs of 130 nm node technology and beyond.